1. Field of the Invention
The present invention relates to the control and distribution of interrupts in a computer system. Specifically, the present invention involves interrupt controllers for automatically distributing interrupts among multiple processors installed in a multiprocessor computer system.
2. Description of the Related Art
The processing requirements of multi-user computer systems for personal and business needs continuously become more demanding. For instance, more complex application programs for use with local area networks are continuously being developed. Moreover, many multi-user systems provide access to more than one operating environment, such as UNIX and DOS, on the same system.
In general, the computers servicing these needs are single processor systems conforming to conventional architectures using a standard input/output I/O bus such as the Extended Industry Standard Architecture (EISA). New and more powerful systems constantly emerge. However, upgrading an old system generally requires investing in substantial hardware modifications or buying a new system.
As processing power demands increase, application software performance and operating systems would benefit from a multiprocessor interconnection architecture capable of providing parallel processing, high interactivity while retaining high batch performance.
One problem which hampers the efficient use of processing power in multiprocessor architectures is interrupt handling. It is not efficient to pass interrupts to all the processors on a common bus without some control over which processors handle which interrupts.